Consultant, Kevin Kennedy Associates Inc.
Providing expertise in electrical engineering, physics, analog/ RF integrated circuit design, PLL, DLL, and VCO circuits, photonics, expert witness testimony, inventing, and related expertise to a wide variety of clients.
Consultant, integrated circuit design consulting firm
Clients included Cravath, DLA Piper, Onyx, Howrey LLP, Avnera, Telaris, Peregrine Semi, Kotura, Motia, Centellax and Jazz Semi.
Principal RFIC Design Engineer, Pulse-Link, Inc., Carlsbad, CA
Founder & Director, Mixed Signal Products, Centellax, Inc., Carlsbad, CA
Responsibilities included providing critical design know-how for the development of new circuits, as well as setting up the design center in Carlsbad, staffing it, and managing design and the testing that was done at headquarters in Santa Rosa. Set out to develop a line of OC-768 (40Gbps) multiplexors and demultiplexors with clock recovery, including Bit Error Rate test ICs, using 120GHz Silicon Germanium (SiGe) BICMOS 0.25u process. Led the development of a Direct Digital Synthesizer, a Fractional-N Delta-Sigma PLL, and a 10 GHz 10-bit DAC. Other chips worked on include 40G dividers, TIA, Laser driver, TWA, Limiting Amplifier, LNA, Mixer, IQ modulator, VCOs up to 45GHz, and 15 GHz accumulators.
Senior Design Engineer/ Senior Staff Engineer, Newport Communications (now Broadcom Corp.), Irvine, CA
Was instrumental in the development of Clock and Data Recovery (CDR) functions in 0.25um through 0.13um CMOS (complementary metal oxide semiconductor) for fiber communications at 2.5Gb/s and 10Gb/s. Gained increased expertise in VCO design and in architectures for PLL and data recovery.
Principal Engineer, Silicon Wave, Inc., San Diego, CA
Was one of the very first engineers hired by Silicon Wave because of critical expertise in high speed Bicmos analog circuits, including PLL design. Worked on the design, layout and test of many integrated circuits for RF, IF I/Q Mod-Demod, AGC, VCO, PLL, CRU (clock recovery unit) and high speed logic in BICMOS (bipolar and complementary metal oxide semiconductor) on SOI (silicon on insulator).
Senior Design Engineer, Applied Micro Circuits Corporation, San Diego, CA
Developed Bicmos analog PLL building blocks for application specific and standard products. Led the design of first 2.5 GHz PLL /Clock Recovery and of mux/demux functions up to 5 GHz, using AMCC's G3.0 bipolar process. Designed and tested two Delay Locked Loop (DLL) ICs that had resolution better than 100 pS and developed MSI circuit for timing delay adjustment, having a resolution of 40 pS.
Senior Design Engineer, Bipolar Group, Brooktree Corporation (now Conexant), San Diego, CA
Worked in DAC converters and timing circuits. Redesigned three ICs to a different process, improving performance, and designed Automatic Test Equipment (ATE) products in AT&T's CBICU complementary bipolar process. Worked on a 275 MHz monolithic PLL and the redesign of a high speed bipolar RAMDAC (Random Access Memory plus DAC).
Analog Design Engineer, TRW, LSI Products Division, La Jolla, CA
Was the principal designer of a combination analog-to-digital (ADC) and digital-to-analog (DAC) converters for a sub-ranging hybrid product, familiar with sample-hold, current mode amplification and characterization of both ADC and DAC. Interfaced with TRW’s Space Park in modeling of an advanced bipolar process. Worked on a 75 MHz reduced power 8-bit ADC converter IC.
Member of Technical Staff, Gould Inc., Dexcel Division, Santa Clara, CA
Designed and tested Monolithic Microwave Integrated Circuit (MMIC) 6-to-18 GHz amplifiers fabricated in Gallium Arsenide, and hybrid assemblies.
